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MC100EP16VT 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing and Internal Input Termination
Description http://onsemi.com MARKING DIAGRAMS*
8 1 SOIC-8 D SUFFIX CASE 751 1 8 KEP63 ALYW G
The MC100EP16VT is a differential receiver functionally equivalent to the 100EP16 with input pins controlling the amplitude of the outputs (pin 1) and providing an internal termination network (pin 4). The VCTRL input pin controls the output amplitude of the EP16VT and is referenced to VCC. (See Figure 4.) The operational range of the VCTRL input is from VBB (a supply at VCC-1.42 V, maximum output amplitude) to VCC (minimum output amplitude). VBB is an externally supplied voltage equal to VCC-1.42 V (See Figures 2 and Figure 3). A variable resistor between VCC and VBB, with the wiper driving VCTRL, can control the output amplitude. Typical application circuits and a VCTRL Voltage vs. Output Amplitude graph are described in this data sheet. When left open, the VCTRL pin will be internally pulled down to VEE and operate as a standard EP16, with 100% output amplitude. The VTT input pin offers an internal termination network for a 50 W line impedance environment, shown in Figure 1. For further reference, see Application Note AND8020, Termination of ECL Logic Devices. Input considerations are required for D and D under no signal conditions to prevent instability. Special considerations are required for differential inputs under No Signal conditions to prevent instability.
Features
8 1 TSSOP-8 DT SUFFIX CASE 948R
8 KP63 ALYWG G
1
* * * * * * * *
220 ps Propagation Delay Maximum Frequency > 4 GHz Typical (See Graph) The 100 Series Contains Temperature Compensation PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V Open Input Default State 50 W Internal Termination Resistor Pb-Free Packages are Available
DFN8 MN SUFFIX CASE 506AA A L Y W M G
1
= Assembly Location = Wafer Lot = Year = Work Week = Date Code = Pb-Free Package
(Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
December, 2006 - Rev. 3
1
Publication Order Number: MC100EP16VT/D
3I MG G 4
MC100EP16VT
Table 1. PIN DESCRIPTION
PIN D 2 50 W D 3 50 W VTT 4 5 VEE 6 Q 7 Q D, D Q, Q VCTRL* VTT VCC VEE EP FUNCTION ECL Data Inputs ECL Data Outputs Output Swing Control Termination Supply Positive Supply Negative Supply Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open.
VCTRL
1
8
VCC
Figure 1. 8-Lead Pinout (Top View) and Logic Diagram
* Pin will default LOW when left open.
Table 2. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Pb Pkg Level 1 Level 1 Level 1 Value 75 kW N/A > 4 kV > 200 V > 2 kV Pb-Free Pkg Level 1 Level 3 Level 1 Value
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC-8 TSSOP-8 DFN8 Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
UL 94 V-0 @ 0.125 in 140 Devices
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Table 3. MAXIMUM RATINGS
Symbol VCC VEE VI Iout TA Tstg qJA qJC qJA qJC qJA Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm <2 to 3 sec @ 248C <2 to 3 sec @ 260C 8 SOIC 8 SOIC 8 SOIC 8 TSSOP 8 TSSOP 8 TSSOP DFN8 DFN8 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 6 -6 6 -6 50 100 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 5% 129 84 265 265 Unit V V V V mA mA C C C/W C/W C/W C/W C/W C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Table 4. DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
-40C Symbol IEE VOH VOL Characteristic Power Supply Current Output HIGH Voltage (Max Swing) (Note 3) VCC VCTRL VEE Output LOW Voltage (Max Swing) (Note 3) VCTRL VBB VCC VCTRL > VBB VCTRL = VCC (Min Swing) VIH VIL VCTRL VIHCMR IIH IIL D, D Input HIGH Voltage (Single-Ended) D, D Input LOW Voltage (Single-Ended) Input Voltage (VCTRL) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 4) Input HIGH Current Input LOW Current (VTT Open) (VTT Open) -150 2105 2075 1355 VEE 2.0 Min 30 2155 Typ 36 Max 42 2405 Min 31 2155 25C Typ 38 Max 44 2405 Min 32 2155 85C Typ 40 Max 48 2405 Unit mA mV mV 1355 1490 See Fig.2 2230 2355 2420 1675 VCC 2.9 150 -150 2095 2075 1355 VEE 2.0 1605 1355 1520 See Fig.2 2220 2345 2420 1675 VCC 2.9 150 -150 2065 2075 1355 VEE 2.0 1605 1355 1520 See Fig.2 2190 2315 2420 1675 VCC 2.9 150 mV mV mV V mA mA 1605
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 3. All loading with 50 W to VCC - 2.0 V. VOH does not change with VCTRL. VOL changes with VCTRL. VCTRL is referenced to VCC. 4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC100EP16VT
Table 5. DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
-40C Symbol IEE VOH VOL Characteristic Power Supply Current Output HIGH Voltage (Note 6) VCC > VCTRL > VEE Output LOW Voltage (Max Swing) (Note 6) VCTRL VBB VCC VCTRL > VBB VCTRL = VCC (Min Swing) VIH VIL VCTRL VIHCMR IIH IIL D, D Input HIGH Voltage (Single-Ended) D, D Input LOW Voltage (Single-Ended) Input Voltage (VCTRL) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 7) Input HIGH Current Input LOW Current (VTT Open) (VTT Open) -150 3805 3775 3055 VEE 2.0 Min 30 3855 Typ 36 3980 Max 42 4105 Min 31 3855 25C Typ 38 3980 Max 44 4105 Min 32 3855 85C Typ 40 3980 Max 48 4105 Unit mA mV mV 3055 3190 See Fig.2 3930 4055 4120 3375 VCC 4.6 150 -150 3795 3775 3055 VEE 2.0 3305 3055 3220 See Fig.2 3920 4045 4120 3375 VCC 4.6 150 -150 3765 3775 3055 VEE 2.0 3305 3055 3220 See Fig.2 3890 4015 4120 3375 VCC 4.6 150 mV mV mV V mA mA 3305
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 6. All loading with 50 W to VCC - 2.0 V. VOH does not change with VCTRL. VOL changes with VCTRL. VCTRL is referenced to VCC. 7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC100EP16VT
Table 6. DC CHARACTERISTICS, NECL VCC = 0 V; VEE = -5.5 V to -3.0 V (Note 8)
-40C Symbol IEE VOH VOL Characteristic Power Supply Current Output HIGH Voltage (Note 9) VCC > VCTRL > VEE Output LOW Voltage (Max Swing) (Note 9) VCTRL VBB VCC VCTRL > VBB VCTRL = VCC (Min Swing) VIH VIL VCTRL VIHCMR D, D Input HIGH Voltage (Single-Ended) D, D Input LOW Voltage (Single-Ended) Input Voltage (VCTRL) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 10) Input HIGH Current Input LOW Current (VTT Open) (VTT Open) -150 -1195 -1225 -1945 VEE VEE+2.0 Min 30 -1145 Typ 36 -1020 Max 42 -895 Min 31 -1145 25C Typ 38 -1020 Max 44 -895 Min 32 -1145 85C Typ 40 -1020 Max 48 -895 Unit mA mV mV -1945 -1810 See Fig.2 -1070 -945 -880 -1625 VCC -0.4 -1205 -1225 -1945 VEE VEE+2.0 -1695 -1945 -1780 See Fig.2 -1080 -955 -880 -1625 VCC -0.4 -1235 -1225 -1945 VEE VEE+2.0 -1695 -1945 -1780 See Fig.2 -1110 -985 -880 -1625 VCC -0.4 mV mV mV V -1695
IIH IIL
150 -150
150 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Input and output parameters vary 1:1 with VCC. 9. All loading with 50 W to VCC - 2.0 V. VOH does not change with VCTRL. VOL changes with VCTRL. VCTRL is referenced to VCC. 10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 7. AC CHARACTERISTICS VCC = 0 V; VEE = -3.0 V to -5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 11)
-40C Symbol fmax tPLH, tPHL tSKEW tJITTER VPP tr, tf Characteristic Maximum Toggle Frequency (See Figure 8. Fmax/JITTER) Propagation Delay to Output Differential Max Swing Min Swing Duty Cycle Skew (Note 12) Cycle-to-Cycle Jitter (See Figure 8. Fmax/JITTER) Input Voltage Swing (Differential Configuration) (Note 13) Output Rise/Fall Times (20% - 80%) Max Swing Q Min Swing 150 70 30 250 200 Min Typ >4 Max Min 25C Typ >4 Max Min 85C Typ >4 Max Unit GHz ps 350 300 20 <1 1200 170 130 150 80 20 250 200 300 250 5.0 0.2 800 130 70 350 300 20 <1 1200 180 120 150 100 20 250 200 300 250 5.0 0.2 800 150 70 350 300 20 <1 1200 200 120 ps ps mV ps
300 250 5.0 0.2 800 120 80
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. 12. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. 13. VPP(min) is minimum input swing for which AC parameters are guaranteed.
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MC100EP16VT
100 90 80 OUTPUT SWING (%) 70 60 50 40 30 20 10 0 0.0 0.5 1.0 VOLTS (V) 1.42 VBB 1.5 2.0
Figure 2. VCC - VCTRL (pin #1)
VPK-PK
VOH
Min Swing
VOL
Max Swing
0.0
0.5
1.0 VOLTS (V)
1.42 VBB
1.5
2.0
Figure 3. VCC - VCTRL
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MC100EP16VT
VCTRL +
VCTRL D
1
8
VCC Q*
2 50 W
7
D
3 50 W
6
Q*
VTT
4
5
VEE
Figure 4. Voltage Source Implementation, VCTRL Pin 1
VCC
VCTRL VBB D
1
8
VCC Q*
2 50 W
7
D VEE VTT
3 50 W 4
6
Q*
5
VEE
Figure 5. Alternative Implementations, VCTRL Pin 1
VCTRL +
VCTRL D
1
8
VCC Q*
2 50 W
7
D
3 50 W
6
Q*
VCC-2 V
VTT
4
5
VEE
Figure 6. Standard Termination Method, VTT Pin 4
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MC100EP16VT
VCTRL +
VCTRL D
1
8
VCC Q*
2 50 W
7
D
3 50 W
6
Q*
VCC 5.0 V 3.3 V
RT 112 W 46 W VEE
VTT RT
4
5
VEE
Figure 7. Alternate "Y" Termination Method, VTT Pin 4
1000 900 800 VOUTpp (mV) 700 600 500 400 300 200 100 0 0.25 V Below VCC (JITTER) 2.00 V Below VCC 1.25 V Below VCC 1.00 V Below VCC 0.75 V Below VCC 10 9 JITTEROUT ps (RMS) 8 7 6 5 4 3 2 1 4000
0
500
1000
1500
2000
2500
3000
3500
FREQUENCY (MHz)
Figure 8. Fmax/Jitter
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 2.0 V
Figure 9. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.) http://onsemi.com
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E E E
EEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEE
MC100EP16VT
ORDERING INFORMATION
Device MC100EP16VTD MC100EP16VTDG MC100EP16VTDR2 MC100EP16VTDR2G MC100EP16VTDT MC100EP16VTDTG MC100EP16VTDTR2 MC100EP16VTDTR2G MC100EP16VTMNR4 MC100EP16VTMNR4G Package SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) DFN8 DFN8 (Pb-Free) Shipping 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC100EP16VT
PACKAGE DIMENSIONS
SOIC-8 NB CASE 751-07 ISSUE AH
-X-
A
8 5
B
1
S
4
0.25 (0.010)
M
Y
M
-Y- G
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
C -Z- H D 0.25 (0.010)
M SEATING PLANE
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC100EP16VT
PACKAGE DIMENSIONS
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8 1
5
L
PIN 1 IDENT
4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
G DETAIL E
-W-
DIM A B C D F G K L M
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MC100EP16VT
PACKAGE DIMENSIONS
DFN8 CASE 506AA-01 ISSUE D
D A B
PIN ONE REFERENCE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 --- 0.25 0.35
E
2X
0.10 C
2X
0.10 C
0.10 C
8X
0.08 C
SEATING PLANE
A1
e/2
1 8X 4
L
K
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
CCC CCC CCC CCC
8
TOP VIEW
A (A3) C e
SIDE VIEW D2
E2
5 8X
b
0.10 C A B 0.05 C
NOTE 3
BOTTOM VIEW
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MC100EP16VT/D

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